Signal Integrity Day

Signal integrity can be hard to fathom. How do you manage the risks in the architecture of your new high-speed electronics solution? Is it better to integrate a System-on-Module, or to create a layout for a custom PCB? What about DDR3 or LPDDR5 and PCIe5/6 compliance? What is the right mix of simulation and measurement? In fact, should you worry about signal integrity at all? What are its fundamental principles anyway? What are the best practices for lay outing high speed PCBs?
These, and many more questions were answered in the full-day in-person seminar on September 5th, 2023.

In this videos you will see Sjoerd Op ’t Land’s presentations. He will give an SI primer, and share his experience in balancing and measurement to maximize Return on Modeling Effort.